eqmap
Using e-graphs for logic synthesis (ICCAD'25)
- egg
- fpga
- rust
- verilog
- yosys
- rtl
- synthesis
- compiler
- Stars
- 38
- Forks
- 6
- + today
- +1
- Created
- 2y
Ranking data as of October 26, 2026 (UTC).
Star History
Today, hour by hour
01
Overview
Using e-graphs for logic synthesis (ICCAD'25) It ranks #899 on GitTiger, gaining +1 star on October 26, 2026 (UTC).
The project is written in Rust and has 6 forks. It was created 2y ago.
Installation
git clone https://github.com/cornell-zhang/eqmap.git
cd eqmap
# see README for setup